Quantum Circuit Optimization Framework Based On ZX-Calculus
Quantum Circuit Optimisation using ZX-Calculus: Unlocking Quantum Efficiency
As quantum computing advances, especially in the noisy intermediate-scale quantum (NISQ) future, quantum circuit optimisation is essential. Increasing the reliability and efficiency of quantum calculations requires reducing the noise and mistakes of two-qubit gates. Kai Chen, Wen Liu, Guo-Sheng Xu, Yangzhi Li, Maoduo Li, and Shouli He from Beijing University of Posts and Telecommunications and the Communication University of China developed a quantum circuit optimisation framework that uses ZX-calculus to significantly reduce these problematic gates.
How is ZX-Calculus?
In its simplest form, ZX-calculus is a diagrammatic language for qubit linear mappings. It was developed by Coecke and Duncan in 2011 from category theory and provides natural visual reasoning for complex quantum processes, making it superior to matrix-based techniques.
ZX diagrams have wires, nodes, and transformation rules.
Wires represent qubits or quantum system states, whose direction represents information or time flow. Nodes represent qubit operations and quantum gates. Z spiders (green circles) and X spiders (red circles) with rotation angles represent Pauli-Z and Pauli-X gates. There are two primary spider node kinds. The Controlled-NOT (CNOT) gate has a red target qubit and a green control qubit, while the Hadamard (H) gate has a yellow square or dashed line. Any quantum gate can be broken into X and Z spiders.
ZX-calculus theory has advanced. Ng et al. expanded Backens' 2014 proof of Clifford gate set completeness to Clifford+T gate sets in 2018, establishing its universality for real-world quantum computing. Van de Wetering improved its completeness theorem in 2020, proving it could represent all quantum computational reasoning. Kissinger's 2020 PyZX framework simplifies and checks equivalence by rewriting circuits as ZX-diagrams.
ZX-Calculus is Essential for Quantum Circuit Optimisation The increased implementation costs and error rates of two-qubit gates drive quantum circuit optimisation, especially in the NISQ era. The optimisation search space becomes more convoluted as quantum circuits grow, making it difficult to find reliable and effective solutions.
These issues are addressed with ZX-calculus:
Eliminating Redundancies: Equivalence-preserving rewriting methods simplify circuit designs and identify functionally similar circuits with fewer gates. Exploiting Global Structural Properties: Unlike rule-based techniques that use predefined local transformations or symbolic and DAG-based approaches constrained by localised rules, ZX-calculus can identify more general circuit isomorphisms and capture compound transformations needed for globally optimal circuit representations. Resolving Conventional Method Limitations: Intermediate representation (IR)-based techniques may not recognise long-range entanglement alterations, yet standard rule-based optimisation approaches often struggle with odd gate configurations. Instead, ZX-calculus-based techniques use filtering transformations to reduce gates by exploiting quantum circuits' algebraic properties transferred onto alternative representations.
Novel Optimisation Framework: Multifaceted Approach
The recently proposed framework combines dynamic grouping and ZX-calculus for complex circuit optimisation. Since it is integrated into a simulated annealing loop for iterative optimisation, the system can escape local optima and converge to a global minimum in two-qubit gates. Every iteration of this method includes three critical steps:
Dynamic Circuit Grouping based on Stochastic method: The quantum circuit is intelligently divided into many subcircuits using a random method based on gate execution order and layer depth. This stochastic grouping diversifies the optimisation search space, increasing the likelihood of ideal subcircuit decompositions and accelerating convergence. ZX-Calculus k-Step Lookahead Guided Search: ZX diagrams are then made for each subcircuit. A new k-step lookahead search method finds and filters the optimal transformations for future steps. Even if they simplify the ZX diagram, anticipatory rule selection removes wasteful paths and avoids transformations that could paradoxically increase the number of two-qubit gates after extraction. The diagram is improved iteratively by selecting candidates with minimal Hadamard edges and then assessing the extracted circuit's two-qubit gate count. Delay Placement Circuit Synthesis and Optimisation: After subcircuit optimisation, updated subcircuits are rebuilt into a global circuit. Delay gate placement, a rule-based post-processing phase, removes gate-level redundancy, especially extra Hadamard (H) gates inserted during ZX-to-circuit extraction. This technique finds more gate cancellation possibilities, which reduces gate count.
Proven Success and Outlook
Experimental results on benchmark datasets, used for logical circuit gate count optimisation, show the approach's usefulness. The suggested solution cut two-qubit gates by 18% compared to the original circuitry.
Additionally, the new strategy outperformed the old:
It reduced two-qubit gates by 25%, surpassing VOQC, Qiskit, and Quartz on difficult ‘gf circuits’. The innovative method optimised ‘gf circuits’, showing that it can find structures rule-based approaches miss, while Nam achieved comparable average reductions. It outperformed PyZX and R2Q by 4%. Nam preprocessing reduced two-qubit gates by 22%, proving the “Our-PP” approach's superiority. The method reduced gate counts by 25%, outperforming R2Q (24%), and PyZX (8%). When used with rule-based preprocessing, it reduced gates by 31%, demonstrating its versatility and resilience. Ablation studies confirmed the critical roles of each element: delayed placement reduced redundant single-qubit gates introduced during ZX extraction, suppressing overhead and minimising gate count; circuit partitioning accelerated convergence; and k-step lookahead consistently reduced two-qubit gates by filtering transformations.
Even though this strategy reduces two-qubit gates well, researchers believe that gate count, circuit depth, and fidelity are key quantum circuit quality indicators. Diagram depth and fidelity may be difficult to assess because to ZX extraction. Future research addresses these challenges by:
Device-aware circuit mapping, improved ZX extraction, and depth-fidelity multi-objective optimisation. Scalable rule search algorithms are being developed to overcome the combinatorial complexity of rule matching for larger circuits. Studying reinforcement learning-based optimisation frameworks for dynamic grouping and transformation selection methods. Connectivity-aware optimisation reduces post-mapping two-qubit gate counts to speed up physical implementation. This pioneering effort advances the synthesis of scalable and efficient quantum circuits. Reducing noisy two-qubit gates makes NISQ-era quantum computing more dependable and effective.
