#driver delay

Interconnect Delay Models – 1

Hi friends,

While evaluating delays of paths in Static Timing Analysis, we check for setup and hold violations. These violations arise when data reaches the destination flop either too early or too late. That delay factor depends upon three important delays i.e. Driver Delay, Interconnect Delay and Receiver Delay. Modelling of these three delays is an important aspect for Static Timing Analysis.