#cordic

Heeey Hello!

14.- If you can live anywhere in the world where would it be? why?

I don’t have a specific anything in mind! I used to think on Venice, or somewhere on New Zealand? ahhah. But right now i would like to live in a place that has the ocean near and hopefully a forest too!

20.- How tall are you?

Last time I was 1.70m/5.57ft? 

36.- Favorite movie? 

Inside Out, Your name/kimi no na wa, Warcraft movie, Lilo & Stitch, Scott Pilgrim Vs the world and Zootopia. 

Excerpt from PDF: Retrospective: A CORDIC Based Configurable Activation Function for NN Applications Omkar Kokane∗ , Gopal Raut∗ , Member, IEEE, Salim Ullah†, , Mukul Lokhande∗‡ , Adam Teman‡ , Senior Member, IEEE, Akash Kumar† , Senior Member, IEEE, and Santosh Kumar Vishvakarma∗ , Senior Member, IEEE ∗NSDCS Research Group, Indian Institute of Technology Indore 453552, India †Ruhr University…

lmao that last video is fantastic

I’m glad you agree, this was a close contender though!

It was not long after I taught a class of Geometry students how to use the sine, cosine, and tangent functions that a student asked me how the calculator got its values. After all, producing the value of sine for a right triangle in class required argument, intuition, and proof--or, in the case of the 45-45-90º, at least thinking about it very carefully and pulling out the Pythagorean. And that was just for nice fractions of 90º!

Swinging around the room and checking in on classwork as I was, I gave a vague answer about approximating functions and moved on. I wasn't sure how to explain Taylor polynomials without Calculus; and, for that matter, I wasn't sure whether the approximation was Taylor, Chebyshev, or any of a dozen other approximating functions I'd run into over the years. So, I decided to look it up that evening.

The answer? NONE OF THEM. 

Summary: This text, above the traditional CORDIC algorithmic foundation, through increasing the number of iterations, has screened the parameter optimally, improve the operational precision, make the soft core designed run in more high occasion of the accuracy requirement, pronunciation, image signal processing, filter technique,etc. when accurately. Output data pass the intersection of IEEE-754 and standard V Visualization, can directly most processor more, have expanded its application area. Have finished hardware implementation in Altera Company NiosⅡ processor by way of increasing from the defined instruction finally. Keyword: CORDIC; Since defined instruction; IEEE-754 standard V Visualization

The application of the floating point transcendental function of the foreword is very extensive, involve Aero-Space, robotics, real-time pronunciation, image signal processing, filter technique, FFT in field of varying etc.. So, it is very important to design the triangular transcendental function of floating point of concurrent implementation. The transcendental function algorithm of hardware implementation, according to the difference between mathematical formula and correspondent realization way, can be divided into table look-up method, polynomial approximation, combines the method, rational number in the multinomial of table look-up and is similar to and five kinds of digits by digit. Through analyzing and comparing these algorithms, this selected works select CORDIC as the algorithm of the transcendental function, and finish hardware implementation with CycloneⅡ chip of Altera Company.

CORDIC kernel and in front and at the back of at type frameworks iterative in internal structure of dealing with on cell design CORDIC, the internal CORDIC structure is shown as in Fig. 1.

The framework in the structure chart 1 of Fig. 1 classical CORDIC hardware implementation is by the control unit, the selector, shift register, ROM, the adder makes up. The control unit of the system adopts the way of realization of the finite state machine, controls the procedure of iteration and data format conversion. The good data value of arc tangent that that preserve is precomputed in ROM, available for adjusting in iterative operation. Can find out and only shift and add or subtract operation from the framework, so is especially suitable to realize by hardware. After each iterative operation, the return of data, until the sufficient number of times is carried out and finished, just export the result. Each iteration should pay judging to the angle value Z before this, decide the symbol of a unit in Fig. 1 according to Z symbol of a unit. Realize this partial key code as follows: if(~z[31]) beginx < =x -(y > > > counter) ; y < =y + (x > > > counter) ; z < =z - atan; endelsebeginx < =x + (y > > > counter) ; y < =y - (x > > > counter) ; z < =z + atan; End leading processing unit is because of the limitations of one's own iteration, the slewing angle of maximum is represented with the formula: (1)For expand, input angular range into, need, carry on preconditioning inputting horning, within making it leave the first quadrant range. Carry on impression taking in inputting the angle, judge symbol to exchange with straight cosine according to the quadrant lived in. In CORDIC kernel design, shows to the inner angle of 0_ range with binary integer of a 32-bit microcomputer, namely 101101100000101101100000 (namely decimal number 11930464) . The processing unit postprocess of the POSTF converts the result that internal CORDIC calculates to IEEE-754 model form before the output, namely the form, its structure is shown as in Fig. 2.

LZDC (Leading zero detection circuit) in the POSTF processing unit hardware structure chart 2 of Fig. 2 It is the detection circuit of the leading zero, its function is to use the statistical findings and begin " 0 " continuously from the most significant position Number,and then according to it number value model form of lasting IEEE-754 calculating. Need to move to left to the mantissa in the course of changing, could be expressed as, the reference index value phase that this displacement comes with the leading processor unit again is reduced, receive and output the exponential value. Sign bit is got by the leading processing procedure directly. Get sign bit, index number value, decimal according to the location connection the data of IEEE-754 form finally, and export from the Ausgang of hardware imterface.

The design and the artificial waveform of software, to originally designing undulate emulation of the software with Quartus II, the value of choosing the angle is respectively, and (namely- ). Think example, the decimal number of iAngle was ' /360)*88.8 =1059425266 (decimal part is neglected) ,It is expressed as 3F258BF2 that sexadecimal. The internal simulation result hexadecimal value of oCos is 3FFD8131, the correspondent IEEE-754 model form value oCos_IEEE754 is 3F7FF804, namely decimal number 0.020942, the computational process same of the sine. The contrast of the simulation result is shown in Table 1. Can be found out from the table, in (0_) In the input span, by originally designing calculating the result error that emulation publishes is smaller than 10-6, show in single precision the error is 0 in the range, and export and is expressed as the standard IEEE754 type. It is 34 to calculate required clock periodicity once.

Increase up to 256 the intersection of user and defined instruction since processor, NiosⅡ of Company, Altera of defined instruction, this is that other SOC systems are incomparable. Let NiosⅡ soft core finish a circuit module function described with HDL if users are self-defining. Defined instructions of since users can finish complicated algorithmic handling capacity within several clock cycles, the logical unit outside the reference-to storage or system, accelerate the execution of the special task, in order to achieve the goal of optimizing. Can realize time consuming and a lot of key algorithm when deal with the software in the system with hard logical circuit from the defined instruction through users, raise the efficiency of the processor greatly. Because the nuclear characteristic in CORDIC, the straight cosine function can be calculated at the same time, suitable to adopt and expand users since the defined instruction is realized, finish the calculation of two kinds of functions with a hardware module. It is the sine or cosine to determine to output by an additional parameter n, so can save half the hardware resources. This text has increased straight cosine in NIOSⅡ from the defined instruction, its code of macro definition is as follows: #define MYCORDIC_N 0x00000002#define MYCORDIC_N_MASK ((1< < 1)-1)#define FLOAT_COS(A) __builtin_custom_fni(MYCORDIC_N+( 1&MYCORDIC_N_MASK) ,(A))#define FLOAT_SIN(A) __builtin_custom_fni(MYCORDIC_N+ (0&MYCORDIC_N_MASK) ,(A))After joining the order, debug in IDE of NiosⅡat the same time the software and hardware, the corresponding C language testing code is omitted here, provide and compare with the result and is shown as Fig. 3 and Fig. 4.

Fig. 3

Fig. 4 system hardwares prove the platform adopt DE2 to develop the board, among them NiosⅡ processor is configured to full function, use 16K data cache and 16K order cache separately, has increased multiplier of the hardware and hardware divider, have turned on the assembly line function, has already reached high performance the most of NiosⅡ soft core processor. Find out while comparing the result with, while using the hardware instruction, calculating the angle of totally identical straight cosine, its operation speed is improved greatly. Need to prove the intersection of software and until computation time that difference uses to input angle there is difference greatly operation, and use the operation of hardware instruction, its computation time is basically constant. Compare with and shown in Table 2 in detail. The error, its magnitude of error within the range of six decimals of operation of software and hardware is 0, it is obvious that originally designs meeting the requirement of high precision positively.

Conclude the speech and originally design regarding improving processor precision and speed as the goal, since defined instruction way exchanges more hardware resources for more quick calculated speed through adding users in NiosⅡ processor, thus respond to the request that the modern real-time Communication is dealt with. Above the traditional CORDIC algorithmic foundation, ingenious improved algorithm, has reached high precision and more quick speed, have more extensive using value. Certainly, originally designed to only finish the hardware IP part of the straight cosine function, there is more work that waits for us to finish, believe through constant efforts, we will finish more function hardwares IP.