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Intel Agilex 5 FGPA

Agilex 5 E-Series

Altera’s latest mid-range FPGAs, the Agilex 5 FPGAs E-Series, are now supported by the recently released Quartus Prime Software v24.1, which can be downloaded right now. Intel are happy to announce that it is now simpler than ever and completely free of charge to take use of the unmatched capability of Altera’s Agilex 5 FPGAs E-Series with the introduction of the state-of-the-art Quartus Prime Software from Altera.

Intel Agilex 5

Free Licence: Get rid of obstacles. With the help of Quartus Prime Pro Edition Software v24.1, you may use the newest E-Series devices at no cost, enabling you to innovate beyond limits!

Streamlined Design Flow: Use Quartus Prime Software to see the smooth integration of intellectual property (IP)-Centric design flow. Their easily customizable design samples streamline the process of getting started so you can concentrate on what really matters your innovative ideas.

New Embedded Processing Capabilities: Make use of the Simics simulator-supported dual-core ARM Cortex-A76 and dual-core ARM Cortex-A55 of the Agilex 5 SoC FPGA, the industry’s first asymmetric processing complex. Additionally, Agilex 5 FPGAs may be combined with the feature-rich, performance- and space-optimized Nios V soft-processor for smaller embedded FPGA applications. Additionally, they collaborate with a number of partners who provide a top-notch suite of tools to improve your FPGA and embedded development experience, including Arm, Wind River, Siemens, Ashling, MathWorks, and many more.

Comprehensive Intellectual Property (IP) Portfolio: With their tried-and-true IP portfolio for Agilex 5 FPGAs, many of which are free, you may shorten the time it takes to market. Reduce the amount of circuitry used and make design timing closure easier with hard IP solutions for PCI Express, Ethernet, and memory protocols, which also support LPDDR5. With PCS’s Ethernet 10G MAC, you can guarantee deterministic and synchronised communication, enhanced by Time-Sensitive Networking (TSN) features.

This version includes the Video and Vision Processing (VVP) portfolio IP for Agilex 5 FPGAs, which enables the entire portfolio of video solutions, as well as additional IPs supporting MIPI D-PHY and MIPI CSI-2. Begin developing your Agilex 5 FPGA designs and rely on additional validated advanced features like JESD204C IP, ORAN IP, LDPC IP, CPRI, and eCPRI among others.

Unprecedented Capabilities: Altera FPGAs may be programmed with cutting-edge capabilities like the following using the Quartus Prime Pro Edition Software v24.1.

Agilex 5 datasheet

Dashboard for Quartus Software Exploration (Preproduction)

With distinct instances of Quartus Prime software, numerous projects running concurrently may be easily coordinated and the compilation and timing results can be seen.

Fresh Features for Compilation: Generation flow of precompiled components (PCCs)Utilising the new precompiled component (PCC) generation flow during compilation, shorten the time it takes to compile synthesis.Start the Simulator using the Quartus Prime GUI.Effortlessly start simulations straight from the Quartus Prime GUI by using the handy “Tools ➤ Run Simulation” menu item. Remove the need for extra procedures to streamline your workflow and save time.

Features and Improvements of Synthesis

Use the RTL Linter Tool to convert older RTL files to Verilog/VHDL standards with ease, optimise RAM inference for better speed and resource use, and reduce warnings in error-free RTL modules to increase readability while developing.

Improved Timing Indicator

Gain more flexibility in timing analysis and SDC scripting with new scripting options; guarantee design integrity with sign-off capabilities for particular combinational loops; and learn more about timing characteristics with enhanced Chip Planner visualisation of asynchronous clock domain crossings (CDCs).

Innovations in Advanced Link Analysers

Link Builder: Use the brand-new Link Builder tool to quickly and easily build high-speed serial connections. Streamline the connection creation procedure by automatically generating schematics and importing channels and devices.

High DPI Monitor Assistance: Benefit from improved readability and display quality thanks to GUI scaling for high DPI displays and automated DPI recognition. Enjoy enhanced usability and user experience.

Enhanced Data Viewer: With improvements to the Data Viewer, analyse forward error correction (FEC) code word faults more effectively. Error outcomes may be easily interpreted and analysed for more efficient error correction techniques.

Enhancements to Simulation Time:

Easy-to-use UI for automated import of devices and channels and schematics. Agilex 7 IP offers faster simulation times with the updated Q run and FEC models.

Qualities:

R-Tile: Transaction Layer (TL) multi-channel DMA IP (AXI) up to Gen5 x16 For flexibility in incorporating third-party PCIe Switch IP, use the bypass mode. A new design example for Gen5 x4 endpoint configuration is also provided.

F-Tile: Utilising FastSIM to reduce simulation time in PIPE mode and providing Ubuntu driver support for all sample designs.increased compatibility for up to 64 embedded endpoints.For greater coverage, the Debug Tool Kit (DTK) was added to the switch IP.

Become a Part of the Community: Hua Xue, VP & GM Software Engineering, remarked, “Intel’re excited to offer Quartus Prime Software v24.1, a crucial milestone in FPGA design.”

“Now, engineers everywhere can easily access the unmatched potential of Agilex 5 FPGAs E-Series.” Quartus’s simplified design process and these cutting-edge technologies allow engineers to reach their full potential for innovation. With their state-of-the-art processing capabilities, Agilex 5 devices transform embedded FPGA applications. These are enhanced by Quartus’s vast IP portfolio, which includes a variety of solutions like Ethernet, PCI Express, memory protocols like LPDDR5, support for MIPI D-PHY, CSI-2, and a suite of video solutions, among many other IPs.

The Quartus Exploration Dashboard offers a user-friendly interface and optimization recommendations, which further improve the design exploration process. Intel’re pushing both the simplicity of use and the fast compiler technologies with Quartus v24.1’s open access to E-Series FPGAs and a simplified design pipeline to enable engineers and innovators to unleash their creativity like never before.”

Intel Agilex 5 price

Normally marketed to corporations and incorporated into bigger systems, the Intel Agilex 5 FPGAs do not have a set pricing that is made accessible to the general public. A number of variables affect the pricing, including:

Model specifics: The Agilex 5 family has two distinct series (D and E) with differing logic cell characteristics and capacities. Models with additional features will cost more.

Volume: If you buy in large quantities, you may be able to negotiate a lower price with distributors or directly with Intel.

Distributor: Price structures may vary significantly throughout distributors.

In a substantial relocation to fulfill the expanding need for personalized work, improved AI capacities, and reduced complete expense of possession, Intel has expanded its Programmable Solutions Team (PSG) offerings and also broadened its Intel Agilex FPGA portfolio. This growth is a testimony to Intel's dedication to giving adjustable as well as versatile system capacities for requiring work and applications, a function that Intel's FPGAs have been playing most importantly. The brand-new items as well as modern technologies were showcased at Intel's FPGA Modern Technology Day on Sept. 18, noting a considerable landmark in Intel's FPGA organization. In 2023 alone, Intel has launched 11 of the anticipated 15 brand-new items, establishing a document for the variety of brand-new item intros in a solitary year. Intel's PSG service device has been carrying out incredibly well, as confirmed by a 35% income development year-over-year reported in its 2nd quarter 2023 profits phone call. This development is a clear indicator of the rising need for Intel's FPGA options and also the firm's capability to satisfy this need with effective and ingenious items. The increased Intel Agilex profile consists of attribute innovations made to assist designers in developing options faster. This is a calculated step by Intel to equip designers as well as speed up the growth of brand-new applications as well as options. In a proposal to promote open-source advancement, Intel is launching the Open FPGA Heap (OFS) to open up resources. This is a considerable action in the direction of advertising openness as well as partnership in the growth of FPGA services. Developers currently have complete accessibility to the open-source Open FPGA Heap (OFS) equipment code, software program code, and technological documents for the system as well as work growth. Intel has additionally introduced the initial manufacturing adapter based on Intel's F2000X framework handling device (IPU) system. The initial F2000X IPU-based manufacturing adapters have actually been released, with manufacturing adapters readily available from Napatech. This notes a substantial turning point in Intel's IPU system advancement. Along with these, Intel disclosed added details concerning 2 brand-new Intel Agilex 3 FPGA Collections: the B-Series as well as C-Series. This brand-new collection is anticipated to additionally improve the abilities of Intel's FPGA profile and offer even more choices for companies as well as designers. Intel is additionally increasing its very early gain access to the program for the Intel Agilex 5 FPGA E-Series, which provides affordable power as well as efficiency for ingrained side applications. This growth is anticipated to offer even more programmers the possibility to take advantage of the abilities of the E-Series for their applications. Intel Agilex 7 FPGAs with R-Tile are currently delivering CXL IP with 2.0 functions in quantity. This is a considerable growth that is anticipated to boost the efficiency as well as capacities of the Agilex 7 FPGAs.

Intel is releasing a brand-new CPU in the Nios V household: the Nios V/c small microcontroller. This is a cost-free, soft-core IP based upon the RISC-V style, additionally broadening the choices readily available to programmers. To conclude, Intel's growth of its FPGA profile as well as the expansion of its PSG offerings is a tactical transfer to satisfy the boosting need for personalized work, boosted AI abilities, as well as reduced complete expense of possession. With the launch of brand-new items and innovations, Intel remains to play a critical function in supplying adjustable as well as adaptable system capacities for requiring applications and work.

In a proposal to promote open-source growth, Intel is launching the Open FPGA Heap (OFS) to open up resources. Developers currently have complete accessibility to the open-source Open FPGA Heap (OFS) equipment code, software application code, and technological paperwork for system and work growth. Intel has additionally introduced the very first manufacturing adapter based on Intel's F2000X framework handling device (IPU) system. This notes a substantial landmark in Intel's IPU system growth.

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