Kunlun Processor shows Efficient Quantum Error Correction
In quantum computing, Kunlun Processor corrects errors efficiently.
Proof of low-overhead quantum error correcting codes
The successful demonstration of low-overhead quantum error correction (QEC) codes advances fault-tolerant quantum computing. According to study, the Kunlun, a powerful new superconducting processor with 32 long-range-coupled transmon qubits, uses advanced quantum low-density parity-check (qLDPC) codes. This research addresses a major industry issue: the high resource cost required to prevent errors in fragile quantum information.
Challenge of Scalability
Quantum computers could revolutionize factorization, chemical simulation, and machine learning. But these gadgets' physical qubits are extremely error-prone. To solve this, quantum error correction redundantly encodes logical qubits over several physical qubits. This lets researchers measure “syndromes” to find and fix problems.
For twenty years, the surface code was the finest solution for this procedure. However, the surface code has low encoding efficiency, quadrupling the number of physical qubits needed as precision (code distance) increases, making large-scale computers costly. The new work solves this “scalability dilemma” by using bivariate bicycle (BB) codes, qLDPC codes known for their high encoding efficiency and hardware-friendliness.
Processor Kunlun
The Kunlun Processor is an experimental superconducting quantum processor designed to test advanced quantum error-correction algorithms. Its importance lies in how qubits are connected and handled, not in their number.
Kunlun, a superconducting quantum processor, was announced in May 2025 in a seminal quantum error correcting experiment. The "scalability dilemma" of quantum computing is addressed with this processor.
Architecture: 32 long-range-linked transmon qubits. Instead of 2D grids that only allow qubit communication, Kunlun uses a “torus” topology with 84 multi-length tunable couplers. Innovative: It showed quantum low-density parity-check (qLDPC) codes, or “bivariate bicycle codes.” These codes are much more efficient than the industry-standard "surface code" and require four times as many physical qubits to prevent errors. Key Tech: The device manages complex, overlapping connections for high-efficiency error correction using “air-bridges” to build a quasi-3D structure on a planar surface.
Kunlun Processor Low-Overhead Quantum Error Correction
Kunlun processor architecture determined these routines' efficacy. Kunlun Processor has a torus connection topology, unlike two-dimensional designs that only communicate nearest neighbors. We integrated eighty-four multi-length adjustable couplers, some of which may span 6.5 mm.
For a degree-6 Tanner graph on a planar semiconductor, the scientists used up to 15 air-bridges per coupler for complicated overlapping connections. These air-bridges allow couplers to cross over without interference, creating a quasi-three-dimensional structure. These complex codes used weight-6 stabilizers, which needed each check qubit to be connected to six data qubits. High connectivity made this achievable.
Experimental Improvements
Researchers demonstrated two codes on the Kunlun Processor hardware:
Distance-4 Bivariate Bicycle Code encoded four logical qubits into 18 data qubits using 14 additional check qubits. The logical error rate per cycle for each qubit was 8.91 ± 0.17 percent. Researchers achieved a 7.77 ± 0.12% logical error rate with Distance-3 qLDPC Code, encoding six logical qubits on 18 data qubits and omitting two check operators. Compared to a surface code of the same distance, the BB code's 1/8 encoding rate reduced resource overhead fourfold. Four distance-4 surface codes would need 124 physical qubits, whereas the BB code used 32.
Understanding Syndrome Circuit
A syndrome measuring circuit is run regularly during mistake correction. Eight tiers of single-qubit gates, seven layers of CZ gates, and a readout pulse comprised the 1895-ns experiment cycle. The researchers achieved 99.22% parallel CZ gate fidelities and 99.95% single-qubit gate fidelities.
Dephasing error mitigation was vital to the experiment. Data qubits are sensitive to decoherence because they remain idle while check qubits are read. The researchers used ten dynamical decoupling pulses in the 920-ns readout window and Pauli X and Y “echo” gates around the CZ gates to address this. They also included leakage rejection, which detected and removed qubits that left the computational domain using three-state readout, improving logical performance.
The Way Forward
The researchers called their proof a “crucial step,” but they have not yet reached the “break-even” point, where a logical qubit outperforms its physical counterparts. Logical error rates still exceed physical error rates.
Numerical simulations allowed progress. By increasing current physical error rates by a suppression factor, the scientists found a transition regime at 0.5 times noise levels. By increasing coding distance, logical errors will decrease exponentially.
Future research will focus on higher gate fidelities, fault-tolerant universal logical gate sets, and expanding the Kunlun Processor architecture to support larger qLDPC codes. This successful experiment shows that long-range, superconducting processors are a suitable substrate for large-scale, effective quantum computers.
