The Excitement is Building for Intel® Omni-Path Architecture
Intel Omni-Path Architecture (Intel OPA) is gearing up to be released in Q4’15 which is just around the corner! As we get closer to our official release, things are getting real and we’re providing more insight into the fabric for our customers and partners. In fact, more Intel Omni-Path architectural level details were just presented on August 26th at Hot Interconnects. Before I talk about the presentation, I want to remind you that this summer at ISC ’15 in Germany, we disclosed the next level of detail and showcased the first Intel OPA public demo through the COSMOS supercomputer simulation.
For those who didn’t make it to Frankfurt, we talked about our evolutionary approach to building the next-generation fabric. We shared how we built upon key elements of Aries* interconnect and Intel® True Scale fabric technology while adding revolutionary features such as:
Traffic Flow Optimization: provides very fine grained control of traffic flow and patterns by making priority decisions so important data, like latency sensitive MPI data, has an express path through the fabric and doesn’t get blocked by low priority traffic. This results in improved performance for high priority jobs and run-to-run consistencies are improved.
Packet Integrity Protection: catches and corrects all single/multi-bit errors in the fabric without adding any additional latency like other error detection & correction technologies. Error detection/corrections is extremely important in fabrics running at the speed and scale of Intel OPA.
Dynamic Lane Scaling: guarantees that a workload will gracefully continue to completion even if one or more lanes of a 4x link fail, rather than shutting down the entire link which was the case with other high performance fabric.
These features are a significant advancement because together they help deliver enhanced performance and scalability through higher MPI rates, lower latency and higher bandwidth. Â They also provide for improved Quality of Service (QoS), resiliency and reliability. Â In total, these feature are designed to support the next generation of data centers with unparalleled price/performance and capability.
At Hot Interconnects we provided even more detail. Our Chief OPA software architect, Todd Rimmer, gave an in-depth presentation on the architectural details of our forthcoming fabric. He delivered more insight into what makes Intel OPA a significant advancement in high performance fabric technology.  He covered the major wire-level protocol changes responsible for the features listed above – specifically the layer between Layer 1 and Layer 2 coined as “Layer 1.5.”  This layer provides the Quality of Service (QoS) and fabric reliability features that will help deliver the performance, resiliency, and scale required for our next-generation HPC deployments. Todd closed by keeping to his software roots by discussing how Intel is upping the ante on the software side with a discussion on Intel OPA software improvements, including the next-generation MPI optimized fabric communication library –  Performance Scaled Messaging 2 (PSM2) and powerful new features for fabric management.
