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We offer Interlaken IP Subsystem, High speed chip to chip interface protocol, Chip-to-Chip and Die-to-Die connectivity, Forward Error Correction (FEC).
High Level Features
·        Supports 112G PAM4 SerDes
·        Supports Interlaken protocol and Ethernet protocol
·        Supports RS(544,514)
·        Supports configurable alignment marker (AM)
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