But only server ones Despite the fact that there is still quite a bit of information on the Internet about the AMD Zen 5 architecture and products based on it, today we have received quite detailed data about CPUs based on Zen 6. The information concerns mainly server CPUs, but it is still important, because some things can be implemented in consumer ones. The author of the Moore’s Law Is Dead channel obtained data on Epyc-E server processors, which are intended for telecommunications and peripheral systems. Such CPUs will only have up to 64 cores, but the “larger” Epyc will, of […]
But only server ones Despite the fact that there is still quite a bit of information on the Internet about the AMD Zen 5 architecture and products based on it, today we have received quite detailed data about CPUs based on Zen 6. [caption id="attachment_85418" align="aligncenter" width="780"] AMD[/caption] The information concerns mainly server CPUs, but it is still important, because some things can be implemented in consumer ones. [caption id="attachment_85419" align="aligncenter" width="780"] AMD[/caption] The author of the Moore's Law Is Dead channel obtained data on Epyc-E server processors, which are intended for telecommunications and peripheral systems. Such CPUs will only have up to 64 cores, but the “larger” Epyc will, of course, have more cores. AMD will pack 32 processor cores into one chiplet. [caption id="attachment_85420" align="aligncenter" width="780"] AMD[/caption] In this case, what interests us most is that Epyc-E will have one chiplet with 32 cores! Let us remember that in almost all AMD processors the chiplet contains eight cores, and only Epyc Bergamo with small Zen 4C cores has chiplets with 16 cores. As you can see, by the time Zen 6 is released, AMD will be able to pack 32 cores per chiplet. This obviously won’t affect consumer Ryzen, but perhaps by that time they will switch to a package of 16 cores per chiplet. Additionally, the 32-chip configuration could allow AMD to easily build 256-core processors. This could already be CPU Venice in SP7 version. https://youtu.be/qpzTmKjaIMU Also, a large number of cores in one chiplet allows AMD to place additional chiplets in the processor without any processor cores at all. FPGAs or other specialized chiplets can be implemented in this way.
