#a40i

1. Introduction to Laser Coding Machines:

Laser coding machines use high-energy lasers focused directly on the surface of objects to induce physical and chemical changes, creating markings.

As the laser beam's focus moves systematically across the marking surface, controlling the laser's activation allows for the creation of specific marking patterns on the object's surface.

Laser marking offers advantages such as non-contact marking, high speed, minimal pollution, no consumable loss, and clear, permanent identification. These benefits give it a competitive edge, leading to its gradual replacement of traditional ink-jet coders.

2. Structure of Laser Coding Machines:

A laser coding machine primarily consists of the following components:

Control System: The core component responsible for editing and processing marking content, generating marking data, transmitting it to the galvo system and laser system, and handling external input.

Laser System: Responsible for generating and transmitting the laser to the galvo system.

Galvo System: Quickly and precisely rotates mirrors to alter the laser beam's path, focusing it into a spot on the marking surface.

Power Supply System: Provides power to the entire laser marking machine, including the controller, laser, and galvo system.

Conveyor Mechanism: Moves items to be marked and uses speed measurement devices to monitor real-time item movement, feeding this data back to the control system.

3. ARM+FPGA-Based Control System Design:

ARM processor manages the human-machine interface, complex data processing, and communication, while the FPGA handles the reception, storage, conversion of marking data, and controls the marking equipment.

The marking control is managed by the marking card, with real-time performance mainly relying on the FPGA. ARM SoM is used for interface display and higher-level computation.

4. Folinx Solution

Forlinx Embedded recommends the FETA40i-C SoM as the ARM platform for laser coding machines, offering notable advantages: Notable advantages:

High Performance Processing: The A40i platform, with its 1.2GHz high frequency, rapidly processes complex coding tasks. In laser coding machines, a high-performance processor ensures speed, precision, and efficiency in coding, with the A40i's high frequency reducing response time, enhancing productivity.

Excellent Display Capabilities: A40i platform supports multiple display interfaces, making the coding interface more intuitive and visually appealing. A clear and user-friendly interface is crucial for operators, who can more easily view and edit coding content via a large screen, improving work efficiency.

Robust Communication Capabilities: A40i features dual Ethernet ports and a 4G communication module, supporting various communication methods. This allows easy data transfer and communication with other devices, meeting the networking needs of modern industrial production, and facilitating future interface upgrades.

Extensive External Expansion Interfaces: A40i platform offers numerous native external expansion interfaces, including 8 x serial ports and 3 x USB. These provide ample connection options for external devices, enabling easy integration and interaction with various peripherals.

Industrial-Grade Stability and Reliability: A40i is an industrial-grade CPU known for its stable and reliable quality. Stability and reliability are critical in laser coding machines, ensuring long-term stable operation in harsh industrial environments, reducing failure rates, and extending equipment lifespan.

In summary, Forlinx Embedded A40i platform offers numerous advantages as the hardware control platform for laser coding machines, meeting the high-performance, high-stability, and high-reliability demands of modern industrial production.

Originally published at www.forlinx.net.

Although there is only one network port on the Forlinx Embedded OKA40i-C EVK, the Allwinner A40i-H processor has two network controllers, so there is a dual network port solution in the datasheet offered by Forlinx Embedded. Engineers may encounter some NIC design problems. We will share three kinds of NIC software problems that appear easy when using the OKA40i-C EVK and troubleshooting ideas.

01 Problem Analysis

Problem description 1: Ethernet initialization error No phy found

When executing the ifconfig eth0 up command, the "No phy found" exception log appears.

Issue analysis:

The common reason for "No phy found" is that the 25M clock used for phy is abnormal, which causes phy to work abnormally, and the gmac driver can't read the phy device information through the mdio interface.

If the MDIO pin configuration or phy address is incorrect, then MDIO doesn't do the pull-up resistor, and GMAC can not read the phy device information. We can use an oscilloscope to measure if the MDIO waveform is correct, or if the phy chip reset fails, it needs to replace the phy chip reset pull-up resistor.

Troubleshooting steps:

(1) Check the phy power supply status;

(2) Check the 25M clock (Soc ephy25M or external crystal) used by phy;

(3) Check if the phy-mode is configured according to the actual board level (mii/rmii/rgmii).

(4) Check the MDIO for pull-up resistors;

(5) Check the MDIO pins configuration;

(6) Is the eMAC phy address consistent with the hardware;

(7) Check that the reset pull-up resistor is consistent with the schematic reference scheme.

MDIO communication is verified as normal:

We can use the phytool tool to read the 0x02 0x03 register. Successful reading of PHY chip ID means the MDIO communication is normal.

Problem description 2: Ethernet initialization error NO SUCN DEVICE

Execute the command ifconfig -a/ifconfig eth0/ifconfig eth0 up. the eth0 device is not found.

Problem analysis:

The Ethernet module configuration is not in effect or there is a GPIO conflict.

Troubleshooting steps:

Step 1: Capture the kernel boot log, search for the "gmac" key field, and check whether the gmac driver has been probed successfully;

Step 2: If the kernel boot log shows mac controller probe failure, the common cause is due to GPIO resource conflict.

Solution:

GPIO conflict will have an error message, according to the error, check the GPIO conflict pins.

Check the Ethernet module configuration.

Problem description 3: Ethernet initialization error Initialize hardware error

Execute the ifconfig eth0 up command and the "Initialize hardware error" exception log appears.

Problem analysis:

Initialize hardware error" appears, usually because the phy does not output RX CLK to the MAC controller, resulting in a soft reset failure within the MAC controller.

Common causes are phy abnormal power supply or 25M clock. Alternatively, we can check data pin clock, and RMILL RX CLK TX CLK.

Troubleshooting steps:

Grab the rx_clk clock waveform with an oscilloscope to see if the clock remains stable at 25M; and if it appears to jump back and forth at 25M/2.5M. That is, MAC and phy are not linked successfully.

Solution:

Software can link successfully by setting register 0 fixed to 100M full duplex after phy reset. Problem solution:

Add phy_write(phydev, 0x0, 0x2100) before phy_connect_direct in geth_phy_init function in drivers/net/ethernet/allwinner/sunxi-gmac.c.

The following are common NIC design issues in the OKA40i-C EVK development, some of which may be due to configuration issues when referencing the solution or improper output signals from the chip. When referring to the dual network port solution for the OKA40i-C EVK, you may refer to the issues summarized in this article for solving the problems in your projects.

The following are some troubleshooting methods for common NIC software problems.

02 Troubleshooting Methods

These methods may provide you with some debugging ideas for phy. The tools mentioned in the following article may help you quickly find and solve NIC problems.

(1) Check that menuconfig and dts Ethernet configuration are turned on; (2) Check whether the phy-mode configuration matches the physical interface between the PHY and GMAC, such as rgmii, rmii, and so on; (3) Check if the GPIO configuration is correct, such as IO multiplexing function, driving capability, etc; (4) Verify that the MDIO is correct by reading the phy ID with the phytool tool.

As shown below, the JL11x1 phy ID reading normal means MDIO communication is normal.

Use the phytool tool to read the phy status register and view the phy chip status. Take JL11x1 as an example: if the 0x01 status register reads the 0x786d indicating the link is successful and can work properly.

That’s all OKA40i-C SBC dual-network port NIC software problem analysis and troubleshooting direction. Hoping it is helpful for your project development.

For additional information, visit the OKA40i-C Single Board Computer

Originally published at www.forlinx.net.