#standard processor

Tensilica Company released a few days ago, at present can support, develop at the board carrying on the intersection of Diamond Standard and the intersection of processor and at a high speed hardware emulation of series in low-cost Avnet LX60 FPGA. The software development engineer can utilize this common and low-cost FPGA to develop the board, run in Diamond Standard processor IP kernel in Xilinx Virtex-4 FPGA, thus accelerate software design, debugs and program optimization.

Tensilica Company Diamond Standard software development engineer's kit (Diamond SDK) Including one IDE (Xtensa Xplorer integrates and designs the development environment) ,Code developing instrument chain and instruction set simulator (ISS) ,It can run and develop the board in Avnet LX60. The software library included of this set of Diamond software tools can support the software engineer to use the storehouse function of standard C, if printf come, carry on the intersection of host computer and printing, operating at the PC and from the intersection of host computer and read/write operation of hard disk of PC.

Tensilica Company imbeds 2 strong functions in Diamond SDK, can utilize Avnet LX60 FPGA to develop the board advantage to develop engineers to obtain more analytical datas to the maximum extent to make, because can in run on the long run time going on the perfomance analysis than ISS to his application. First of all, through based on FPGA hardware perfomance analysis, system can operation of generating routine analyze file make can develop engineer fast the intersection of accurate positioning and the intersection of characteristic and bottleneck of run program. This analytical data can be observed by way of diagramming in Tensilica Company Xtensa Xplorer IDE.

Secondly, compile (feedback compilation) through feedbacking ,Developing engineers can set up the sign, thus the compiler can collect the program derivation (circulate, skip etc.) Carried out the statistical information of the number of times. Xtensa C/C ++ compiler then go on with statistical information the compile routine come on optimizer again: ( a) Through putting the branch most often used in having branched code to optimize the speed; And (b) Optimize the code magnitude by compiling the routine less likely to carry out in order to make the little code magnitude instead of at a high speed. Such running speed based on that the ones that feedbacked were compiled the means has improved utility program 5-15%, and reduced 15% of the code magnitude.