#cache misses

Data prefetching has been considered an effective way to cross the performance gap between processor and memory and to mask data access latency caused by cache misses. Data prefetching prefers data closer to a processor before it is actually needed with hardware and or software support. Many prefetching techniques have been proposed in the few years to reduce data access latency by taking advantage of multi core architectures. In this paper, a taxonomy that classifies various design concerns has been proposed in developing a prefetching strategy. The various prefetching strategies and issues that have to be considered in designing a prefetching strategy for multi core processors.